Product Profile of Link Layer Controller with Cycle Master Cable
Silicon Interfaces Pvt. Ltd. offers Link Layer Controller with Cycle Master Cable. Silicon Interfaces Pvt. Ltd. supplies solutions and services in the technology segment and as a technology-facilitator for retail, banking, financial, telecom, travel and trade segment for internet, applications and the enterprise using Microsoft, J2EE and IBM technologies on Microsoft Operating Systems and UNIX on Intel compatible and other processor platforms. Link Layer Controller with Cycle Master Cable is a functional block available for insertion into a customer`s ASIC design, which supports the IEEE 1394-1995 Draft specifications for a high-speed serial bus. Link Layer Controller with Cycle Master Cable
is implemented using VHDL synthesizable code to provide portability across Silicon Interfaces` Gate Array and Cell-Based ASIC technologies. It provides data packet delivery service for asynchronous and isochronous [real-time] data transmission. It performs arbitration request, packet generation and checking as well as data and acknowledgement transmission.
Key Features of Link Layer Controller with Cycle Master Cable
- Half Duplex Independent; Transmit and Receive Data Path controlled by Rx Tx Controller.
- 32-bit Generic Host Bus Interface.
- Has a hand-shaking signal for Host.
- Full Implementation of Link Core.
- Supports Asynchronous, Isochronous and Cycle start packet Transmit and Receive.
- Automatic 32-bit CRC generation and error detection. CRC
- Cycle Master cable.
- Supports all required 11 Packet Formats; 9 Asynchronous and 2 Isochronous as per standard.
